Dr. Kye-Shin Lee


Dr. Kye-Shin Lee

Title: Assistant Professor
Department: Electrical and Computer Engineering
Phone: 330-972-8452
Fax: 330-972-6487
Email: klee3@uakron.edu
Curriculum Vitae: Download in PDF format


Biography

- Degrees

        2005 Ph.D. University of Texas at Dallas, Dept. of EE

        2002 M.S. Texas A&M University, Dept. of EE

        1992 B.S. Korea University, Dept. of EE

 

- Professional Societies

• IEEE Circuits and Systems (CAS) Society, Member 2001 - present


Research Accomplishments

Research Interests

Analog and mixed signal circuit design with emphasis on data converters (ADC and DAC). In order to meet the new needs for emerging applications such as next generation tele-communication, sensors, mobile display drivers, bio-medical, and MEMs, development of improved architecture and circuits for ADCs and DACs are highly demanding. Following are current research projects:

• High speed and low power analog-to-digital and digital-to-analog converters

• High performance amplifiers (smart amplifiers)

• High temperature analog-to-digital converters and sensor applications

• DACs, backlight controller and touch sensor readout circuitry for mobile display drivers

   ( joint project with Sun Moon Univ. and Korea Univ. )

• RF mixer and wireless system modeling ( joint project with Dr. Madanayake and Dr. Baharami )

• Self powered sensors ( joint project with Civil Eng. Dept. )

• 3D package using structural electronics ( joint project with Mechanical Eng. Dept. )  

Publications

• S. H. Yang, K. S. Lee, S. Kim, and Y. M. Lee, “A switched-capacitor PWM generator for LCD backlight

   brightness control”, to be published in IEICE Electronics Express

• S. H. Yang, K. S. Lee, S. Kim, and Y. M. Lee, “Charge-redistribution DAC with double bit processing in

   single capacitor”, Electronics Letters, vol. 47, no. 5, pp. 312 – 313, March 2011

• S. H. Yang, S. Kim, K. S. Lee, and, Y. M. Lee “A design of 8-bit cyclic DAC with mismatch compensation

   of capacitors”, Trans. KIEE (ISSN: 1975-8359), vol. 60, no. 2, pp. 315-319, Feb. 2011

K. S. Lee and Y. M. Lee, “Switched-capacitor cyclic DAC with mismatch charge compensation”,

   Electronics Letters, vol. 46, no. 13, pp. 902 – 903, Jun. 2010

• Y. M. Lee and K. S. Lee, “Characterization of cyclic digital-to-analog converter for display data driving”,

   IEEK Journal (ISSN: 1229-6392), vol. SC-47, no. 3, pp. 13-18, May 2010

K. S. Lee, “Mixed CT/DT cascaded sigma-delta modulator”, Journal of Semiconductor Technology and

   Science, vol. 9, pp. 233–239, Dec. 2009  

K. S. Lee, S. Kwon, and F. Maloberti, “A power efficient time-interleaved SD modulator for broadband

   applications”, IEEE Journal of Solid State Circuits, vol. 42, pp. 1206-1215, Jun. 2007 

K. S. Lee, Y. Choi, and F. Maloberti, “Domino free 4-path time-interleaved second order sigma-delta

   modulator”, Analog Integrated Circuits and Signal Processing, vol. 43, pp. 225–235, Jun. 2005

K. S. Lee, Y. Choi, and F. Maloberti, “SC amplifier and SC integrator with an accurate gain of 2”, IEEE 

   Trans. on Circuits and Systems-II, vol. 52, pp. 194 -198, April 2005

K. S. Lee and F. Maloberti, “Time-interleaved sigma-delta modulator using output prediction scheme”,

    IEEE Trans. on Circuits and Systems-II, vol. 51, pp. 537-541, Oct. 2004

 

Conference papers:

• Y. M. Lee and K. S. Lee, “On-chip touch sensor readout circuit using SC charge pump based C-to-V

    converter”, to be presented in Euro-Display 2011, Bordeaux-Arcachon, France

• N. R. Karnati, K. S. Lee, J. Carletta, and R. Veillette, “A power efficient polyphase sharpened CIC filter

   for sigma-delta ADCs”, to be presented in MWSCAS 2011, Seoul Korea 

• Y. M. Lee and K. S. Lee, “LCD backlight controller using passive sigma-delta modulator PWM

   generator”, Int. Display Workshop (IDW), Fukuoka Japan, Dec. 2010, pp. 1659-1660 

• U. Nukala, and K. S. Lee, “Compact current steering DAC with component swapping calibration”, IEEE

   Circuits and Systems Workshop, Dallas TX, Oct. 2010, pp. 1-4

• R. S. Gaddam, K. S. Lee , and Y. M. Lee “Parasitic insensitive 10-bit SC DAC for large sized flat panel

   displays”, Crystal Valley Conference & Exhibition (CVCE), Asan Korea, Oct. 2010, pp. 271-272    

K. S. Lee and Y. M. Lee, “Switched capacitor PWM generator for LCD backlight controllers”, ICEIC 2010,   

    Cebu Philippines, Jun. 2010, pp. 361-364 

• Y. M. Lee and K. S. Lee, “Charge redistribution digital-to-analog converter for large sized flat panel displays”, Int. Display Workshop (IDW), Miyazaki Japan, Dec. 2009, pp. 1553-1554

  • Y. M. Lee and K. S. Lee, “A compact cyclic DAC architecture for mobile display drivers”, Int. Meeting on Information Display (IMID), KINTEX Korea, Oct. 2009, pp. 1578-1581

K. S. Lee, H. Kim, and J. S. Park, “Sensitivity analysis of direct conversion receivers to analog-to-digital converter performance”, MWSCAS 2009, Cancun Mexico, Aug. 2009, pp. 272-275

K. S. Lee and R. Byrd, “Macro-modeling of discrete-time sigma-delta ADCs”, Texas Instruments Analog EDA Sym., Dallas TX, May 2008

   • R. Byrd and K. S. Lee, “A discrete-time single amplifier SD ADC for multi-mode wireless applications”, Texas Instruments RF Sym., Dallas TX, Dec. 2007

   • H. Kim and K. S. Lee, “Sigma-delta ADC characterization using noise transfer function pole-zero tracking”, IEEE Int. Test Conf., San Jose CA, Oct. 2007

   • K. S. Lee and H. Kim, “SD ADC characterization using NTF pole-zero pattern analysis”, Texas Instruments Sym. on Test, Richardson TX, Aug. 2007

   • J. Koh, K. S. Lee, A. Fayed and R. Byrd, “System and methods for mismatch cancellation in switched capacitor circuits”, Texas Instruments High Performance Analog Signal Processing Sym., Tucson AZ, April 2007

   • O. Altun, R. Hezar, R. Byrd, K. S. Lee and G. Gomez, “Reference system design for process, voltage, temperature insensitive continuous time sigma-delta modulators”, Texas Instruments High Performance Analog Signal Processing Sym., Tucson AZ, April 2007

   • R. Byrd, K. S. Lee, A. Fayed,  O. Altun, G. Balachandran, S. T. Tan, T. Fisher, M. Mahmoud and G. Gomez, “A power optimized dual mode GSM/WCDMA SD ADC in 65nm and 45nm digital CMOS”, Texas Instruments High Performance Analog Signal Processing Sym., Tucson AZ, April 2007

   • J. Koh, K. S. Lee, A. Mohieldin, and G. Wan, “Opportunities of circuit simulation performance gain for low-power architectures”, Texas Instruments High Performance Analog Signal Processing Sym., Tucson AZ, April 2006

   • K. S. Lee, S. Kwon and F. Maloberti, “A 5.4mW, 2-channel time-interleaved multi-bit SD modulator with 80dB SNR and 85dB DR for ADSL”, ISSCC Dig. Tech. Papers, vol. 49, San Francisco, CA, Feb. 2006, pp. 70-71

 • K. S. Lee, Y. Choi and F. Maloberti, “Domino free 4-path second order time-interleaved sigma-delta modulator”, IEEE Int. Sym. Circuits and Systems, vol. 1, Vancuver, Canada, May 2004, pp. 473-476

   • K. S. Lee and F. Maloberti, “A 1.8V, 1MS/s, 85dB SNR, 2+2 mash SD modulator with ±0.9V reference voltage”,Symposium on VLSI Circuits Dig. Tech. Papers, Kyoto, Japan, Jun. 2003, pp. 71-74

   • K. S. Lee, Y. Choi, D. Aksin and F. Maloberti, “Feasibility study of a 1.2GHz sampling clock 14-bit Si-Ge BiCMOS sigma-delta modulator”, Texas Instruments High Performance Analog Signal Processing Sym., Tucson AZ, April 2003

 

Patents:

• R. Byrd and K. S. Lee, A discrete-time single-amplifier 2nd order delta-sigma ADC, U.S. Patent No.7564389 issued July 21, 2009

K. S. Lee, Color signal processing circuit with hue/gain control and frequency conversion mechanisms, U.S. Patent No.5953059 issued Sept. 14, 1999

- Recent Publications and Presentations

  Journal papers:


Courses

• 4400:361 Electronic Design, Spring 2010

• 4400:693 Data Converters, Summer 2010

• 4400:598 Analog IC Design, Fall 2010


Students

• Ph.D.

    - Mohammad Alam

• MS

    - Nikhil Reddy Karnati

    - Utthej Nukala

    - Ravi Shankar Gaddam

    - Md. Naimul Hasan

    - Gaunglei Zhang